Performance of output stage plays a significant role in overall performance of audio power amplifier and, together with VAS output stage, may be considered to be the major source of distortions.
Performance of output stage is highly dependent on driving impedance. This means that we have to take into account realistic output impedance of VAS stage. This may create some confusion and results uncertainty, because we have to consider particular driving conditions. And if this conditions changes, results may vary. Some stages that perform better with high impedance source are not necessarily the winners for low impedance driving condition.
To address this, I created driving circuit that corresponds to driving conditions I’m interested in. If you considering different driving conditions, the circuit could be easily modified to reflect this.
I would like to analyze 4 different output stages:
Schematics are represented by the following pictures.
Suggested output stages are relatively simple and I don’t think that they require detailed explanation. All 3 designs (schematic 2, 3, and 4) are trying to address collector-base capacitance modulation issues and improve performance of classic output stage (schematic 1) in high impedance driving condition by adding additional or improved buffer. Though, schematic 3 is using the same amount of stages as schematic 1.
Testing arrangements around all 4 output stages are the same and deserve additional explanations. Driving circuit is symmetrical and expected to have very high output impedance. Each side of the driver is loaded with 1 Megaohm resistor, shunted with 10pF. This more or less corresponds to the output of my VAS, but may be very different from driving conditions in your amplifier. For example, commonly used miller compensation (or any other compensation, utilizing feedback around VAS stage itself) is likely to change driving impedance to the lower and, of course, frequency dependent value. Some output stages may have much lower output impedance even without feedback around them. I would highly recommend adjusting driving conditions for your particular VAS to have meaningful simulations.
Integrator servo loop is used to provide quasi static output conditions, corresponding to desired offset. This allows to test the circuits with 0V dc offset or evaluate DC offset influence. As an example, this offset is used to evaluate modulation of Ccb, while performing AC analysis.